cmos-ccd 1h delay line for pal description the cxl5003m/p are general-purpose cmos-ccd delay line ics that provide 1h delay time for pal. features low power consumption 110mw (typ.) small size package (8-pin sop, dip) low differential gain dg = 3% (typ.) input signal amplitude 180 ire (= 1.28vp-p, max.) low input clock amplitude operation 150mvp-p (min.) built-in peripheral circuits (clock driver, timing generator, autobias, and output circuits) functions 848-bit ccd register clock drivers autobias circuit sync tip clamp circuit sample and hold circuit structure cmos-ccd absolute maximum ratings (ta = 25?) supply voltage v dd 11 v supply voltage v cl 6v operating temperature topr ?0 to +60 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d cxl5003m 350 mw cxl5003p 480 mw recommended operating conditions supply voltage v dd 9 5% v v cl 5 5% v recommended clock conditions input clock amplitude v clk 150mvp-p to 1.0vp-p (250mvp-p typ.) clock frequency f clk 13.300856mhz ?1 e51215b79-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. cxl5003m/p cxl5003m 8 pin sop (plastic) cxl5003p 8 pin dip (plastic)
? 2 cxl5003m/p blook diagram i n a u t o f e e d 5 8 4 8 - b i t s h i f t r e g i s t e r f 1 f 2 a u t o b i a s c i r c u i t c l a m p c i r c u i t o u t a m p s / h a m p a m p 6 7 8 2 v s s v c l c l k 4 d u t y c o n t r o l c i r c u i t 1 c l o c k d r i v e r s 3 v d d r e f . ( 1 b i t ) f 2 f 1 pin description pin no. symbol description impedance [ ] 1 2 3 4 v ss v cl clk v dd gnd 5v power supply clock input 9v power supply > 100k pin no. symbol description impedance [ ] 5 6 7 8 out feed auto in signal output feedback dc output autobias dc output signal input 600 to 1k > 100k 10k > 100k
? 3 cxl5003m/p electrical characteristics (ta = 25 c, v dd = 9.0v, v cl = 5.0v, f clk = 13.3mhz, v clk = 250mvp-p sine wave, see "electrical characteristics test circuit") item symbol measuring condition sw conditions measuring point min. typ. max. unit 1 2 ma ma db db % deg vp-p db v v v v 5 16 3 5 5 1.28 6.5 6.5 3.3 3.7 4 14 0 ?.1 3 3 60 5.0 5.0 2.3 2.7 ? ?.0 55 3.5 3.5 1.3 1.7 a1 a2 v1 v1 s v2 v2 v3 v4 v5 v6 a a b a a a a a a a b, c e f d d a 250khz, 1.28vp-p, sine wave input 250khz, 1.28vp-p, sine wave input ig = 20 log (output voltage [vp-p] / 1.28 [vp-p]) dissipation at 4.43mhz in relation to 250khz fg = 20 log (v 4.43mhz / v 250khz ) (note 1) 5-staircase wave input y = 140 ire (= 1.0vp-p) measure s point with vector scope (note 2) s: input = 250khz, 1.0vp-p output (vp-p) n: input = dc ground output (mvrms) 250khz, 1.28vp-p, sine wave input i dd i cl ig fg dg dp v in-ac s/n v in-ac v auto-dc v feed-dc v out-dc supply current insertion gain frequency response differential gain differential phase allowable input amplitude noise output dc voltage
? 4 cxl5003m/p l p f s w 2 a b v b i a s 9 v n o t e 3 ) a 1 5 v a 2 0 . 0 1 f c l k f c l k = 1 3 . 3 m h z v c l k = 2 5 0 m v p - p s i n e w a v e 0 . 0 1 f v 4 0 . 1 f v 5 v 3 s w 1 0 . 1 f 1 m w a . b . c . d . e . f . 9 v 5 . 1 k v 6 b p f n o t e 4 ) v 1 v 2 v e c t o r s c o p e s v s s v c l c l k v d d i n a u t o f e e d o u t c x l 5 0 0 3 m / p 5 6 7 8 4 2 3 1 1 0 0 k 2 5 0 k h z , 1 . 2 8 v p - p s i n e w a v e 2 5 0 k h z , 3 0 0 m v p - p s i n e w a v e 4 . 4 3 m h z , 3 0 0 m v p - p s i n e w a v e 5 - s t a i r c a s e w a v e g r o u n d 2 5 0 k h z , 1 . 0 v p - p s i n e w a v e electrical characteristics test circuit
? 5 cxl5003m/p note 1) frequency response measuring condition v 4.43mhz (output signal voltage [vp-p] at 4.43mhz input) v 250khz (output signal voltage [vp-p] at 250khz input) set pin 8 (in) voltage [v] = v in-dc + 640mv. 4 . 4 3 m h z , 3 0 0 m v p - p s i n e w a v e 2 5 0 k h z , 3 0 0 m v p - p s i n e w a v e 6 4 0 m v ( a d j u s t w i t h v b i a s ) v i n - d c [ v ] note 2) differential gain and differential phase measuring condition 1 h 6 4 . 0 s 4 0 i r e 1 4 0 i r e ( 1 . 0 v p - p ) c h r o m a 4 0 i r e 5 - s t a i r c a s e w a v e s i g n a l d g a n d d p a r e m e a s u r e d a t o u t p u t s p o i n t b y v e c t o r s c o p e . note 3) lpf frequency response 0 5 . 8 1 3 . 3 f r e q u e n c y [ m h z ] 5 0 3 0 [ d b ] ( d e l a y t i m e 1 7 0 n s ) note 4) bpf frequency response 0 5 . 1 m 1 3 . 3 m f r e q u e n c y [ h z ] 5 0 3 0 [ d b ] 2 0 0 5 0
? 6 cxl5003m/p application circuit l . p . f c x l 5 0 0 3 m / p 5 v 0 . 0 1 f c l k f c l k = 1 3 . 3 m h z v c l k = 2 5 0 m v p - p s i n e w a v e 0 . 0 1 f 0 . 1 f c o m p o s i t e v i d e o s i g n a l i n p u t 0 . 1 f 1 m w 9 v 5 . 1 k 5 6 7 8 4 2 1 h d e l a y s i g n a l o u t p u t 3 1 9 v 0 . 0 1 f 4 7 f 0 . 0 1 f 4 7 f 2 s a 1 1 7 5 d e l a y t i m e 1 7 0 n s application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same . 0 1 2 3 f g f r e q u e n c y r e s p o n s e [ d b ] f r e q u e n c y r e s p o n s e v s . a m b i e n t t e m p e r a t u r e 2 0 t a a m b i e n t t e m p e r a t u r e [ c ] 0 2 0 4 0 6 0 4 i n p u t = 3 0 0 m v p - p 4 . 4 3 m h z , s i n e w a v e 0 1 2 3 v c l s u p p l y v o l t a g e [ v ] 4 . 7 5 . 0 5 . 3 4 f r e q u e n c y r e s p o n s e v s . s u p p l y v o l t a g e i n p u t = 3 0 0 m v p - p 4 . 4 3 m h z , s i n e w a v e f g f r e q u e n c y r e s p o n s e [ d b ] 0 1 2 3 8 . 5 9 . 0 9 . 5 4 v d d s u p p l y v o l t a g e [ v ] f r e q u e n c y r e s p o n s e v s . s u p p l y v o l t a g e i n p u t = 3 0 0 m v p - p 4 . 4 3 m h z , s i n e w a v e f g f r e q u e n c y r e s p o n s e [ d b ] t a a m b i e n t t e m p e r a t u r e [ c ] 1 0 1 2 0 6 0 3 2 0 2 0 4 0 i n p u t = 1 . 2 8 v p - p 2 5 0 k h z , s i n e w a v e i g i n s e r t i o n g a i n [ d b ] i n s e r t i o n g a i n v s . a m b i e n t t e m p e r a t u r e
? 7 cxl5003m/p 1 0 1 2 4 . 7 5 . 0 5 . 3 3 4 3 2 1 2 0 2 0 6 0 0 0 4 0 0 2 3 4 1 0 k 1 0 0 k 1 m 1 4 . 7 5 . 3 5 . 0 4 3 2 1 0 8 . 5 9 . 5 9 . 0 4 3 2 1 0 0 1 2 3 8 . 5 9 . 0 9 . 5 1 g a i n [ d b ] i g i n s e r t i o n g a i n [ d b ] i n s e r t i o n g a i n v s . s u p p l y v o l t a g e v c l s u p p l y v o l t a g e [ v ] i n p u t = 1 . 2 8 v p - p 2 5 0 k h z , s i n e w a v e i g i n s e r t i o n g a i n [ d b ] i n s e r t i o n g a i n v s . s u p p l y v o l t a g e v d d s u p p l y v o l t a g e [ v ] i n p u t = 1 . 2 8 v p - p 2 5 0 k h z , s i n e w a v e d g d i f f e r e n t i a l g a i n [ % ] d i f f e r e n t i a l g a i n v s . a m b i e n t t e m p e r a t u r e t a a m b i e n t t e m p e r a t u r e [ c ] d g d i f f e r e n t i a l g a i n [ % ] d i f f e r e n t i a l g a i n v s . s u p p l y v o l t a g e v c l s u p p l y v o l t a g e [ v ] d g d i f f e r e n t i a l g a i n [ % ] d i f f e r e n t i a l g a i n v s . s u p p l y v o l t a g e v d d s u p p l y v o l t a g e [ v ] f r e q u e n c y r e s p o n s e f f r e q u e n c y [ h z ]
? 8 cxl5003m/p package outline unit: mm s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r p l a t i n g 4 2 / c o p p e r a l l o y 8 p i n s o p ( p l a s t i c ) 6 . 1 + 0 . 4 0 . 1 5 . 3 + 0 . 3 0 . 1 1 . 8 5 + 0 . 4 0 . 1 5 0 . 1 + 0 . 2 0 . 0 5 0 . 2 + 0 . 1 0 . 0 5 0 . 4 5 0 . 1 1 . 2 7 4 1 7 . 9 0 . 4 6 . 9 0 . 5 0 . 2 0 . 2 4 m 0 . 1 g s o p - 8 p - l 0 1 s o p 0 0 8 - p - 0 3 0 0 8 5 0 . 1 5 cxl5003m s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r p l a t i n g c o p p e r a l l o y 8 p i n d i p ( p l a s t i c ) 9 . 4 0 . 1 + 0 . 4 2 . 5 4 1 4 5 8 1 . 2 0 . 1 5 0 . 5 0 . 1 3 . 0 m i n 0 . 5 m i n 3 . 7 0 . 1 + 0 . 4 7 . 6 2 6 . 4 0 . 1 + 0 . 3 0 . 2 5 0 . 0 5 + 0 . 1 0 t o 1 5 0 . 5 g d i p - 8 p - 0 1 d i p 0 0 8 - p - 0 3 0 0 cxl5003p
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